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Senior RTL Designers

Company: Mindlance
Location: Menlo Park
Posted on: June 12, 2021

Job Description:

Job DescriptionSenior RTL DesignersDuration:0-7 month(s)Description/Comment:CMT Level 08RESPONSIBILITIESContribute to the development of efficient Architectures and contribute to ASIC Architecture, design and verificationUnderstand our in-house IPs needed and how they need to be integrated, connected and verifiedDrive the top-level Architecture definition and develop the necessary RTLDrive the chip-level integration, verification plan development and verificationSupervise the RTL-to-GDS flow and assist with synthesis and timing closureSupport the test program development, chip validation and chip life until production maturityWork with FPGA engineers to perform early prototypingSupport hand-off and integration of blocks into larger SOC environmentsAssist with Algorithm analysis, verification and improvementContribute to ASIC digital architecture, design and verificationAbility to communicate clearlyMINIMUM QUALIFICATIONS10+ years of experience as a Digital Design Engineer and/or a Chip Lead5+ years of experience in uP and/or GPU and/or Video ProcessingExperience in RTL coding, synthesis and/or SoC IntegrationExperience in digital design ArchitectureBS Electrical Engineering/Computer Science or equivalent experiencePREFERRED QUALIFICATIONSSystem Verilog OVM/UVM experiencePython (or similar) scripting experienceExperience in SoC integration and ASIC architectureExperience in DFT/Testability requirement and test program definitionExperience using High Speed interfaces like PCIe, USB, MIPIMasters degree in EEAdditional Job Details:1 - Digital Site Designing (P3 - Advanced). Thank you for your help and support!Warm Regards,Mamta KumariASSOCIATE RECRUITMENT MANAGERc: 631 359 8017 mindlance open jobs Follow us on To provide feedback, email: | To unsubscribe, email:

Keywords: Mindlance, San Francisco , Senior RTL Designers, Other , Menlo Park, California

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