SoC Design Engineer

Company: INTEL
Location: Alviso
Posted on: November 26, 2022

Job Description:

Job Description Intel is a global leader, creating world-changing technology that enables progress and enriches live. We are at the intersection of several technology inflections - artificial intelligence, 5G network transformation, and the rise of the intelligent edge- that together will shape the future of technology. This is to fill a position in Programmable Solutions Group (PSG) Technology Engineering (PTE) group, the ideal candidate will be responsible for process technology pathfinding and Field Programmable Gate Array (FPGA) co-optimization for best-in-class perf/watt/cost. The Programmable Technology Engine ering (P T E) team within Intel Programmable Solutions Group is seeking exceptional talent for a SoC Design Engineer to work with a diverse team. As the SOC Design Engineer your responsibilities will include but not limited to:

• Perform Design-Technology Co-optimization tasks involving cross-functional.
• Provide cross function support to business unit teams including Intel and Foundry process technology, product design, package, and business units.
• Provide technical support to resolve process and foundry collateral issues encountered in PSG product execution through cross-organizational collaborations.
• Develop and lead test chips.
• Tape out to validate critical and unique product design and IPs to improve A0 quality. Qualifications Minimum Education Requirement Bachelor's or Master's degree in Electrical Engineering or related field. Minimum Qualification:
  • 5+ years of experience in the semiconductor industry.
  • Experience in either APR Digital, Custom Digital or Analog circuit design and verification.
  • Experience with relevant industry EDA tools in any of the following: ICC2, Fusion Compiler, Innovous, Hspice, Spectre, StarRC, Virtuoso. Preferred Qualifications:
    • Experience with CMOS device physics and advanced CMOS process flow.
    • Experience with various disaggregation and packaging technologies.
    • Experience in library cell or memory compiler design and optimization.
    • Experience with product power rollup and/or timing signoff.
    • Experience in SPICE models, DRC/DFM rules for advanced processes (7nm and beyond). Inside this Business GroupThe Programmable Solutions Group (PSG) was formed from the acquisition of Altera. As part of Intel, PSG will create market-leading programmable logic devices that deliver a wider range of capabilities than customers experience today. Combining Altera's industry-leading FPGA technology and customer support with Intel's world-class semiconductor manufacturing capabilities will enable customers to create the next generation of electronic systems with unmatched performance and power efficiency. PSG takes pride in creating an energetic and dynamic work environment that is driven by ingenuity and innovation. We believe the growth and success of our group is directly linked to the growth and satisfaction of our employees. That is why PSG is committed to a work environment that is flexible and collaborative, and allows our employees to reach their full potential.Other LocationsUS,San JoseCovid StatementIntel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.Posting StatementAll qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.BenefitsWe offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here: Working ModelThis role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.

Keywords: INTEL, San Francisco , SoC Design Engineer, Engineering , Alviso, California