SanFranRecruiter Since 2001
the smart solution for San Francisco jobs

Principal IP Verification Engineer

Company: RapidSilicon
Location: San Francisco
Posted on: January 16, 2022

Job Description:

Job DescriptionThe Principal IP Verification Engineer will set the technical direction for design verification actions

  • Responsible for FPGA design verification at the IP and subsystem levels of hierarchy
  • Ensure that the chip functionality and the FPGA customer use-model are verified and consistent
  • Development of testbench architecture and testplans
  • Work with SoC level DV team for reuse of test collateral at SoC and system levels
  • Provide technical guidance to worldwide IP DV teamMinimum Qualifications
    • B.S. in EE/CE/CS (M.S. preferred)
    • 12 years in chip development, 6 of those years in DV
    • 5 years using a programming language, such as Python
    • Hands-on project experience using a UVM DV environment
    • Experience coordinating projects and developing talent between local and remote teamsPreferred Skills
      • Developed a UVM based testbench from scratch
      • Developed an FPGA product; used an FPGA product
      • Experience using a continuous integration system

Keywords: RapidSilicon, San Francisco , Principal IP Verification Engineer, Engineering , San Francisco, California

Click here to apply!

Didn't find what you're looking for? Search again!

I'm looking for
in category
within


Log In or Create An Account

Get the latest California jobs by following @recnetCA on Twitter!

San Francisco RSS job feeds